(China (Mainland))
Product Summary
The LAN8700IC-AEZG consists of an encoder/decoder, scrambler/descrambler, wave-shaping transmitter, output driver, twisted-pair receiver with adaptive equalizer and baseline wander (BLW) correction, and clock and data recovery functions. The LAN8700IC-AEZG can be configured to support either the Media Independent Interface (MII) or the Reduced Media Independent Interface (RMII). The LAN8700IC-AEZG is compliant with IEEE 802.3-2005 standards (MII Pins tolerant to 3.6V) and supports both IEEE 802.3-2005 compliant and vendor-specific register functions. It contains a fullduplex 10-BASE-T/100BASE-TX transceiver and supports 10-Mbps (10BASE-T) operation on Category 3 and Category 5 unshielded twisted-pair cable, and 100-Mbps (100BASE-TX) operation on Category 5 unshielded twisted-pair cable.
Parametrics
LAN8700IC-AEZG maximum ratings: (1)Number of Pins: 36; (2)Supply Voltage (DC): 3.00 V (min); (3)RoHS: Compliant.
Features
LAN8700IC-AEZG features: (1)Single-Chip Ethernet Physical Layer Transceiver(PHY); (2)ESD Protection levels of ±8kV HBM without external protection devices; (3)ESD protection levels of IEC61000-4-2, ±8kV contact mode, and ±15kV for air discharge mode per independent test facility; (4)Comprehensive SMSC flexPWRTM Technology. Flexible Power Management Architecture; (5)LVCMOS Variable I/O voltage range: +1.6V to +3.6V; (6)Integrated 3.3V to 1.8V regulator for optional single supply operation. Regulator can be disabled if 1.8V system supply is; (7)available.; (8)Performs HP Auto-MDIX in accordance with IEEE 802.3ab specification; (9)Cable length greater than 150 meters; (10)Automatic Polarity Correction; (11)Latch-Up Performance Exceeds 150mA per EIA/JESD 78, Class II; (12)Energy Detect power-down mode; (13)Low Current consumption power down mode.
Diagrams
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 LAN8700iC-AEZG |
SMSC |
Ethernet ICs Same But IND Temp |
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LAN8700IC-AEZG-TR |
SMSC |
Ethernet ICs Hi Perform Ethernet PHY |
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